D-Power : ferramenta VHDL para estimar o consumo de potência dinâmica e arquiteturas superescalares.

Abstract

Technological innovations constantly emerge in computer systems. Its primary focus is on the improve of performance, since applications are increasingly complex. One way to improve performance is to increase the hardware. This is the case of superscalar processors, which have several queues and functional units capable of providing simultaneous execution of multiple instructions. However, this increase in hardware has its implications, like a larger area required on the chip and a consequent increase in power consumption. This boost in power consumption raises heat dissipation, difficult cooling and circuit expansion and reduces the autonomy of mobile devices, among other factors. Because of these problems, the power consumption is target of several studies which try to estimate it and find alternatives to reduce it before the design of the chip. In this context, this paper presents an alternative to analyze and estimate power consumption in components of superscalar processors based on VHDL (Very High-Speed Integrated Circuit Hardware Description Language). The paper presents the D-Power tool, a tool designed to estimate dynamic power consumption in components of the fetch stage in superscalar processors. Based on the entries parameters, the tool is able to verify, among several models of components, which one are more advantageous in relation to power consumption and performance.